Though the characteristics of the metallic channels have been continuously improved, the demand of the overall IT system performance requires to find advanced solutions to overtake the channel bottlenecks, like losses, reflections, crosstalk, jitter and skew. Those challenges are normally encountered at high speeds and they are worsening the entire system performance whenever the temperature, humidity and aging are taken into account.

This project is addressing all these issues by proposing a plan which aims to study, research, implement and finally demonstrate new innovative multi standard solutions capable to transmit and receive reliable data at very high speed up to 25Gb/sec. The project addresses the following areas of studies:

• Characterization and modeling of the main metallic channels
• Channel equalization, including the algorithms for adaptive equalization
• Time base generators at very low jitter
• Data Timing Recovery, including optimum algorithms with respect to adaptive equalization
• Optimum Encoding Decoding
• BER predictions and demo

The potential products are all the Systems On Chip, including Serial Interfaces for on board and inter boards system communications, such as HDD, NAS, Automotive (Drive By Wire applications), LAN, etc.

This project is lead with a direct link to ST Networking & Storage Division in the Computer & Communication Infrastructure Product Group.

This activity is pursued by the SerDes team.
For further details you can contact Prof. F.Svelto or ST team leader M.Pozzoni.