STUDIO DI MICROELETTRONICA

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For the 24-77GHz area:

Recent Conference and Journal publications

  1. F. Vecchi, S.Bozzola, M.Pozzoni, D.Guermandi, E.Temporiti, M.Repossi, U.Decanis, A.Mazzanti, F.Svelto: "A wide-band mm-wave CMOS Receiver for Gb/s communications employing inter-stage coupled resonators" Proceedings of ISSCC, February 2010
  2. A.Mazzanti, E.Monaco, M.Pozzoni, F.Svelto : "A 13.1% Tuning Range 115GHz Frequency Generator Based on Injection-Locked Frequency Doubler in 65nm CMOS" Proceedings of ISSCC, February 2010
  3. F. Vecchi, S. Bozzola, M. Pozzoni, D. Guermandi, E. Temporiti, M. Repossi, U. Decanis, A. Mazzanti, F. Svelto: "A 60GHz Receiver with 13GHz Bandwidth for Gbit/s Wireless Links in 65nm CMOS" Proceedings of the IEEE International Conference on Integrated Circuits Design and Technology, June 2010
  4. E. Monaco, M. Pozzoni, F. Svelto, A. Mazzanti, "A 6mW, 115GHz CMOS Injection-Locked Frequency Doubler with Differential Output" Proceedings of the IEEE International Conference on Integrated Circuits Design and Technology, June 2010
  5. E. Monaco, M. Pozzoni, F. Svelto, A. Mazzanti: "Injection locked CMOS frequency doublers for m-wave and mm-wave applications" IEEE Journal of Solid State Circuits, Volume 45,  No. 8,  August 2010

 

For the All Digital PLL area:

Recent Conference and Journal publications

  1. Weltin-Wu, E. Temporiti, D. Baldi, M. Cusmai, F. Svelto: "A 3.5GHz Wideband ADPLL with Fractional Spur Suppression Through TDC Dithering and feedforward compensation" Proceedings of ISSCC, February 2010
  2. C. Weltin-Wu, E. Temporiti, M. Cusmai, D. Baldi, F. Svelto: "Insights into wide-band fractional ADPLLs: modeling and calibration of nonlinearity induced fractional spurs" IEEE Transaction on Circuits and Systems I regular papers, Volume 57,  No. 9,  September 2010

 

For the Serial Interface area:

Recent Conference and Journal publications

  1. M. Pozzoni, S. Erba, D. Sanzogni, M. Ganzerli, G. Spelgatti, P. Viola, D. Baldi, M. Repossi, F. Svelto: "A 12Gb/s 39dB loss-recovery unclocked DFE receiver with Bi-dimensional equalization" Proceedings of ISSCC, February 2010
 
 

 

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