STUDIO DI MICROELETTRONICA

2006 Paper's list

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For the analog RF area:

Recent Conference and Journal publications

  1. A.Liscidini, A.Mazzanti, R.Tonietto, L.Vandi, P.Andreani and R.Castello
    “A 5.4mW GPS CMOS quadrature front-end based on a single stage LNA-Mixer-VCO”
    Proceedings of ISSSC 2006,
    February 5 – 9, 2006
  2. F.Agnelli, G.Albasini, I.Bietti, A.Gnudi, A.Lacaita, D.Manstretta, R.Rovatti, E.Sacchi, P.Savazzi, F.Svelto, E.Temporiti, S.Vitali, and R.Castello
    “Wireless multi-standard terminals: system analysis and design of a reconfigurable RF front-end”
    Circuits and Systems Magazine, IEEE
    Volume 6, Issue 1, First Quarter 2006 Page(s):38 – 59
  3. Baschirotto, R.Castello, F.Campi, G.Cesura, M.Toma, R.Guerrieri, R.Lodi, L.Lavagno, and P.Malcovati
    “Baseband analog front-end and digital back-end for reconfigurable multi-standard terminals”
    Circuits and Systems Magazine, IEEE
    Volume 6, Issue 1, First Quarter 2006 Page(s):8 – 28
  4. W.Audoglio, E.Zuffetti, G.Cesura, R.Castello
    “A 6-10 bits reconfigurable 20MS/s digitally enhanced pipelined ADC for multi-standard wireless terminals”
    Proceeding of Wireless Reconfigurable Terminals and Platforms conference
    April 10 – 12, 2006
  5. M.Bettini, I.Bietti, R.Cannizzaro, D.Romualdini, E.Sacchi, E.Temporiti, R.Tonietto, P.Vilmercati, R.Castello, P.Uggetti
    “Towards a direct modulation, LINC based, reconfigurable CMOS multistandard transmitter for wireless phone applications”
    Proceeding of Wireless Reconfigurable Terminals and Platforms conference
    April 10 – 12, 2006
  6. R.Massolini, G.Cesura, and R.Castello
    “A Fully Digital Fast Convergence Algorithm for Nonlinearity Correction in Multistage ADC”
    Circuits and Systems II: Express Briefs, IEEE Transactions on [see also Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on]
    Volume 53,  Issue 5,  May 2006 Page(s):389 – 393
  7. A.Mazzanti, L.Larcher, R.Brama and F.Svelto
    “Analysis of reliability and power efficiency in cascode class-E Pas”
    Solid-State Circuits, IEEE Journal of
    Volume 41,  Issue 5,  May 2006 Page(s):1222 - 1229
  8. L.Tee, E.Sacchi, R.Bocock, N.Wongkomet and P.R.Gray
    "A Cartesian-Feedback Linearized CMOS RF Transmitter for EDGE Modulation"
    Proceedings of the 2006 Symposium on VLSI Circuits, June 2006
  9. P.Nepa, G.Manara, S.Mugnaini, G.Tribellini, S.Cioci, G.Albasini and E.Sacchi
    "Differential Planar Antennas for 2.4/5.2 GHz WLAN Applications"
    2006 IEEE AP-S International Symposium on Antennas and Propagation
    July 9 - 15, 2006
  10. A.Liscidini, C.Ghezzi, E.Depaoli, G.Albasini, I.Bietti and R.Castello
    “Common Gate Transformer Feedback LNA in a High IIP3 Current Mode RF CMOS Front-End”
    Proceedings of the CICC 2006,
    September 10 - 13, 2006
  11. G.Albasini, L.Mori, I.Bietti and R.Castello
    "A multi-standard WLAN RF front-end transmitter with single-spiral dual-resonant tank loads"
    Proceedings of the ESSCIRC 2006,
    September 18 - 22, 2006
  12. W.Audoglio, E.Zuffetti, G.Cesura, and R.Castello
    "A 6-10 bits Reconfigurable 20MS/s Digitally Enhanced Pipelined ADC for Multi-Standard Wireless Terminals"
    Proceedings of the ESSCIRC 2006,
    September 18 - 22, 2006
  13. S.Bianchi, M.Signini, A.Baschirotto, I.Bietti, C.Bona, A.Canobbio, M.Introini, E.Sacchi, and R.Castello
    "A 5mA CMOS FM Front-End with 39 dB IRR and 52 dB Channel Selectivity"
    Proceedings of the ESSCIRC 2006,
    September 18 - 22, 2006
  14. R.Tonietto, E.Zuffetti, R.Castello, and I.Bietti
    "A 3MHz bandwidth low noise RF all digital PLL with 12ps resolution time to digital converter"
    Proceedings of the ESSCIRC 2006,
    September 18 - 22, 2006
  15. A.Panigada, and I.Galton
    "Digital Background Correction of Harmonic Distortion in Pipelined ADCs"
    Circuits and Systems I: Regular papers, IEEE Transactions on
    September 2006

 

For the Ultra Wide Band area:

Patents
  1. G.Cusmai, M.Repossi, G.Albasini, and F.Svelto
    "The use of transformer in LC tanks to tune resonant frequency and to get quadrature oscillators"
    Filing request July 2006

 

For the Serial Interface area:

Patents
  1. M.Pozzoni
    "A half-rate decision feedback equalization scheme"
    Filing request July 2006

 

For the Probe Storage area:

Patents
  1. G.Bollati, A.Bosi, and G.Cesura
    “Probe Storage R/W channel using two heads”
    Filing request February 2006
  2. G.Albasini, M.Fedeli, M.Introini, and M.Zuffada
    "The use of charge sensing amplifier in data storage applications"
    Filing request July 2006
  3. M.Zuffada, M.Fedeli, G.Albasini, and M.Rossi
    "New solutions for non-destructive reading in data storage based on ferro-electric materials"
    Filing request August 2006
 
 

 

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