For the analog RF area:

Recent Conference and Journal publications

1. A.Bosi, A.Panigada, G.Cesura and R.Castello
   An 80MHz 4x Over-sampled Cascaded DS-Pipelined ADC with 75dB DR and 87dB SFDR”
   Proceedings of the ISSCC 2005,
   February 6-10 2005, San Francisco, USA
2. I.Bietti and R.Castello
   “Spread Spectrum PLL: Direct Modulation with Wideband PLLs”
   GIRAFE FORUM at the ISSCC 2005
   February 6-10 2005, San Francisco, USA
3. A.Mazzanti, L.Larcher, R.Brama, and F.Svelto
   “A 1.4-2GHz wideband CMOS class-E power amplifier delivering 23dBm peak with 67% PAE”
   Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE
   12-14 June 2005 Page(s):425 – 428
4. L.Vandi, P.Andreani, E.Temporiti, E.Sacchi, I.Bietti, C.Ghezzi, and R.Castello.
   “Toroidal inductors in CMOS processes”
   NORCHIP Conference, 2005. 23^rd
   21-22 Nov. 2005 Page(s):293 - 296
5. M.Valla, G.Montagna, R.Castello, R.Tonietto, and I.Bietti
   “A 72-mW CMOS 802.11a direct conversion front-end with 3.5-dB NF and 200-kHz 1/f noise corner”
   Solid-State Circuits, IEEE Journal of
   Volume 40,  Issue 4, April 2005 Page(s):970 – 977

1. I.Bietti and R.Tonietto
   “Phase shifting coupling technique for multi-phase LC-tank based ring oscillator”
   Filing request June 2005
2. R.Tonietto and F.Radice
   “Six phase synchronous by-4 loop divider with no forbidden state for symmetrical loading of the oscillator in PLL clock synthesizers”
   Filing request June 2005
3. G.Bollati and G.Albasini
   “High Pass amplifier based on a differential pair degenerated by complementary common base structures”
   Filing request July 2005
4. G.Bollati and G.Albasini
   “High Pass amplifier based on a differential degenerated by common emitter structures”
   Filing request July 2005

For the Serial Interface area:

Recent Conference and Journal publications

1. F.Centurelli, A.Golfarelli, J.Guinea, L.Masini, D.Morigi, M.Pozzoni, G.Scotti, and A.A.Trifiletti
   "A 10-Gb/s CMU/CDR chip-set in SiGe BiCMOS commercial technology with multistandard capability"
   Very Large Scale Integration (VLSI) Systems, IEEE Transactions on Volume 13, Issue 2, Feb 2005 Page(s):191 - 200

For the MEMORY area:

Recent Conference and Journal publications

1. F.Bedeschi, E.Bonizzoni, G.Casagrande, R.Gastaldi, C.Resta, G.Torelli, and D.Zella
   "SET and RESET pulse characterization in BJT-selected phase-change memories"
   Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
2. F.Bedeschi, R.Bez, C.Boffino, E.Bonizzoni, E.C.Buda, G.Casagrande, L.Costa, M.Ferraro, R.Gastaldi, O.Khouri, F.Ottogalli, F.Pellizzer, A.Pirovano, C.Resta, G.Torelli, and M.Tosi
   "4-Mb MOSFET-selected /spl mu/trench phase-change memory experimental chip"
   Solid-State Circuits, IEEE Journal of Volume 40, Issue 7, July 2005 Page(s):1557 - 1565